Design example
High-Voltage Sample-and-Hold Amplifier Circuits
These analog circuits combine sample-and-hold with high-voltage amplification. A sample-and-hold circuit captures an analog voltage and retains it between updates; the retained value gradually drifts and needs periodic refresh. The amplifier scales the held signal to a high-voltage output. The output is unipolar, meaning it operates from 0 V upward rather than swinging negative.
Design targets
- High-voltage supply rail
- 125–300 V
- Required low-voltage rails
- +6.0 to +7.5 V and −6.5 to −4.5 V; both required in addition to the HV rail
- Output range
- 0 V to HV rail − 5 V (up to 295 V at a 300 V rail)
- Nominal voltage gain
- 72 V/V
- Capacitive load
- 0–3 nF per output
- Slew rate, no load
- 2.2 V/µs rising, 2.0 V/µs falling
- Operating temperature
- −10 to +85 °C
Practical operating notes
- Design scope covers the sample-and-hold and high-voltage amplifier circuits. Channel-selection logic and shared output-current-limit controllers are outside this design scope.
- The high-voltage rail and both low-voltage supply rails are required. Up to 295 V output requires a 300 V high-voltage rail; it is not available across the whole supply range.
- The input is arranged around 0–4.096 V. The usable output depends on supply headroom, so the entire input span is not linear at lower high-voltage rails.
- The rising and falling slew targets apply with no load. They do not specify performance at 3 nF. Available drive current, load capacitance and thermal limits must be assessed for the application.
- Held voltages gradually drift. Periodic refresh is needed; no output-settling or refresh-rate guarantee is specified here.
Possible applications
- Capacitive MEMS (microelectromechanical systems, tiny mechanical devices made with chip-fabrication methods)
- Piezoelectric positioning and actuation
- Optical MEMS switching
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