AI Data Center Interconnects: Where Copper, Pluggable Optics, LPO, CPO and Optical I/O Fit
See where copper still wins, where fiber takes over, and how pluggable optics, LPO, CPO and optical I/O shift system responsibility.
Insights
Inside the 48 V AI-Server eFuse: Why 80 V-Class Protection Still Matters
At a 48/54 V AI-server input, protection must do more than limit inrush. Integrated eFuses and external-MOSFET hot-swap controllers make different tradeoffs in safe operating area, current scaling, thermal design, fault timing and telemetry. Here is how to compare them on equal terms.
Inside the 48 V AI-Server eFuse: Why 80 V-Class Protection Still Matters Read More »
Beyond eVTOL: Where Power-Analog ICs Fit in the Low-Altitude Economy
The low-altitude economy extends far beyond passenger eVTOL. Industrial UAVs, cargo aircraft, docks, chargers, protected power distribution and diagnostic telemetry may create earlier opportunities for power-analog IC suppliers.
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At HV/HC Scale, Protection — Not the Switch — Is Becoming the Battleground
At multi-kilovolt, hundreds-of-amp scale, device speed is only part of the contest. DC fault energy, always-on breaker losses, microsecond protection windows, hybrid architectures, packaging, and qualification increasingly decide which power-semiconductor systems are viable.
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At 800 VDC, Hot Swap Becomes the Analog Control Plane of the AI Rack
800 VDC receives attention for GaN and SiC conversion, but the less-visible design frontier is the analog protection boundary that must connect, measure, diagnose, and isolate high-power compute trays.
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SOI or BCD for High-Voltage Analog: Decide Before the Schematic
The useful question is not which process is better. It is whether isolation, thermal path, power-device integration, reliability, package, and test assumptions match the product risk.
SOI or BCD for High-Voltage Analog: Decide Before the Schematic Read More »
From 48V Racks to 800V AI Factories: Where Custom Analog and Power ICs Re-enter the Data-Center Stack
AI infrastructure is not only a GPU story. Rising rack power, fast load transients, 48 V rack limits, and emerging 800 VDC architectures are moving hard problems back into analog and power IC design. The opportunity is real, but it must be framed as a source-backed design-space opening, not a guaranteed socket.
OCS MEMS Driver ICs: Why Quasi-Static Mirrors Need Different Analog Thinking
ADI’s 32-channel HV DAC driver family is in lifecycle transition. Here is what the drive current and settling delta means for OCS MEMS mirror designs – and what you need to validate.
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Graphene in the Semiconductor Ecosystem: What Is Real, What Is Not, and Where the Opportunity Actually Is
Graphene is one of the most over-cited materials in semiconductor presentations. Most commercial “graphene” products are reduced graphene oxide or pyrolytic graphite, not monolayer CVD graphene. Two applications have crossed into commercial production. Everything else — including BEOL interconnects and logic transistors — is laboratory research. This insight separates the genuine near-term opportunities from the decade-long research bets.
Why High-Voltage ICs Move to Ceramic Packages: Heat, Isolation, and the Customers Who Actually Need Them
High voltage alone does not force a ceramic package. Ceramic becomes compelling when voltage combines with high current, power dissipation, hermeticity, harsh environments, or long-life reliability requirements. The real growth is in EV power electronics, renewable inverters, AI data-center power, industrial drives, RF, aerospace, and medical high-voltage systems.